Article: Jim Hogan on using Formal along with random fault verification - FirstEDA
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Article: Jim Hogan on using Formal along with random fault verification

From: [ Jim Hogan of Vista Ventures LLC ]
Subject: Using Formal along with random fault verification

 

Hi, John

 

Now it’s time to discuss the second, much more complicated aspect of testing
safety critical chips: random fault verification. This is needed because
even if the chip was designed 100% properly, unexpected physical effects
can still occur while the chip is in operation causing it to malfunction.

 

For example, the electronics in a moving car can have faults caused by the
chip getting too hot, or radiation from the sun — or a fast spinning engine
part functioning like a big magnet that causes an electromagnetic failure.
All these effects might flip a signal value or a bit in memory to the
opposite state.

 

The negative consequence of random faults during operation are usually an
“on-to-off” or “off-to-on” effect. Some examples might be:

 

– The brake pedal suddenly activates during travel
– The cruise control turns off
– The airbag unexpectedly opens