PR: Aldec to Present Software Driven Test of FPGA Prototype - FirstEDA
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PR: Aldec to Present Software Driven Test of FPGA Prototype

Aldec to Present Software Driven Test of FPGA Prototype @ DVCon Europe 2017

Aldec announced today that they will present “Tutorial: Software Driven Test of FPGA Prototype” at the DVCon Europe Conference and Exhibition to be held on October 16 – 17, 2017 in Munich, Germany.

 

Recent evolutions of FPGA technology follows the SoC path known from ASIC designs. We now have hybrid devices such as Xilinx® Zynq™ that combines ARM Cortex with reconfigurable FPGA within a single chip. These devices are flexible enough to be used as embedded software driven testbench for the design prototyped in FPGA. Limited FPGA capacity of Zynq-like devices is not an obstacle in this regard because additional high capacity FPGA parts can be added to the FPGA board such as the Xilinx UltraScale (XCVU440) that provides an estimated 26 Million ASIC gates.