Concept Engineering - FirstEDA
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Concept Engineering

…provides visualisation and debugging technologies for electronic circuits and systems, including schematic generation for all major design levels. These technologies help electronic design engineers to understand, debug, optimise and document their designs.

Concept Engineering’s solutions are used in many fields within EDA including RTL development, IP reuse, ASIC and SoC design, FPGA design, analogue/mixed-signal design, logic synthesis, design verification, test automation, post-layout analysis, debugging and visualisation on system level, RTL level and netlist level.

FirstEDA is proud to be the sole distribution and support channel for Concept Engineering in the UK, Ireland and across Northern Europe. The products we support are:

StarVision PRO
Visualisation & debugging of mixed signal & digital designs / FPGA / ASIC

StarVision is an RTL-, gate- and SPICE-level integrated debugging and visualisation tool. It has been developed to help electronics engineers cope with the increasing use of building blocks in SoC designs, by allowing them to work at different design levels of abstraction (RTL, gate, transistor, analogue and parasitics) as well as with different design languages and netlist formats.

RTLvision PRO
Debugging & visualisation of RTL code / FPGA / ASIC
 

RTLvision PRO provides easy RTL debugging and fast visualisation of RTL code, enabling engineers to implement and optimise VHDL, Verilog or SystemVerilog code.

GateVision PRO
Gate-level netlist viewing & debugging / FPGA / ASIC

GateVision is a graphical gate-level netlist analyser and netlist viewer. It provides designers working on even the largest IC’s and SoCs with intuitive design navigation, netlist viewing, waveform viewing, logic cone extraction, interactive logic cone viewing for netlist debugging and design documentation.

SpiceVision PRO
design visualisation & debugging of SPICE files / ASIC

SpiceVision PRO takes SPICE netlists and models and generates clean, easy-to-read transistor-level schematics, circuit fragments and design documentation in order to accelerate circuit design, circuit debugging and circuit optimisation.

Based in Freiburg, Germany, Concept Engineering is a privately-owned company. It was founded in 1990 to develop and market innovative schematic generation and viewing technologies for use with logic synthesis, verification, test automation and physical design tools.

The company’s customers are primarily EDA tool manufacturers, in-house CAD tool developers, semiconductor companies, SoC/IC/ASIC and FPGA designers.

For more information, please visit the Concept Engineering website.