StarVision PRO - FirstEDA
18578
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StarVision PRO

Debugging & Visualisation of Mixed Signal & Digital Designs / FPGA / ASIC

StarVision PRO is an RTL-, gate- and SPICE-level integrated debugging and visualisation tool. It has been developed to help electronics engineers cope with the increasing use of building blocks in SoC designs, by allowing them to work at different design levels of abstraction (RTL, gate, transistor, analogue and parasitics) as well as with different design languages and netlist formats.

FIRST AND FOREMOST

StarVision PRO is an IDE for mixed-signal and digital designs that makes the visualisation and analysis for complex designs easier and more transparent.

DISPLAY FEATURES AND BENEFITS
  • Ultra-fast HDL reader and graphics on the fly makes it easier to understand, debug, change and optimise Verilog, VHDL and SystemVerilog code
  • Schematics from SPICE netlists – providing easier and faster debugging of complex circuits
  • Supported dialects include SPICE, HSPICE, Spectre, Calibre, CDL, Eldo and PSPICE
  • A powerful GUI provides multiple views, including tree, schematic, waveform and source file plus drag and drop between different views for increased circuit understanding.
  • A Cone Window makes possible incremental schematic navigation (for easy design exploration)
  • Tcl UserWare API allows interfacing with tool flow and definition of electrical rule checks
  • Circuit fragment save – circuit netlists can be saved as SPICE files or Verilog files for future reuse as IP, or for partial simulation
  • Automatic clock tree and clock domain extraction and visualisation for the faster detection and resolution of clock domain problems
  • Full support for mixed language and mixed-signal designs – designers can easily develop and debug today’s most complex heterogeneous designs (described in SystemVerilog, Verilog, VHDL, SPICE, HSPICE etc.)
  • Parasitic analysis features allows for the visualisation and analysis of parasitic networks (DSPF, RSPF, SPEF) and provides capabilities to create SPICE netlists for critical circuit fragment simulation
  • A 32/64-bit database delivers higher performance and increased capacity for very large designs
FirstEDA have represented Concept Engineering’s StarVision PRO for over 10 years. With StarVision PRO, we enable engineers to quickly understand and debug mixed-mode designs and to integrate IP building blocks into their complex SoCs and ICs.